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M·CORE is a low-power, RISC-based microcontroller architecture developed by Motorola (subsequently Freescale, now part of NXP), intended for use in embedded systems. Introduced in late 1997, the architecture combines a 32-bit internal data path with 16-bit instructions,^[1] and includes a four-stage instruction pipeline. Initial implementations used a 360nm process and ran at 50 MHz.

M·CORE processors^[2] employ a von Neumann architecture with shared program and data bus—executing instructions from within data memory is possible. Motorola engineers designed M·CORE to have low power consumption and high code density.^[3]

References

Processors
Industrial control unit	14500
6800 family	6800 6809 see also: Hitachi 6309 68HC05 68HC08 68HC11 68HC12 68HC16
68000 family	68000 68008 68010 68012 68020 68030 68040 68060 ColdFire DragonBall
Embedded system 68k-variants	68EC000 68EC020 68EC030 68EC040 68LC040 68EC060 68LC060
88000	MC88100 MC88110
Floating-point coprocessors (FPUs)	68881 68882
Memory management units (MMU)	68451 68851
PowerPC family	PPC e200 PPC 6xx/e300 PPC 7xx PPC e500 PPC 74xx/e600 PPC e5500 PowerQUICC QorIQ PPC e6500
ARM	i.MX

Microcontrollers
8-bit	6801/6803 6802 6804 68HC05 68HC08 S08 RS08 68HC11 68HC12 68HC16
16/32-bit	683xx
24-bit	DSP568xx DSPcontroller
32-bit	M·CORE MPC5xx PowerQUICC PowerPC 5000 i.MX

v t e Reduced instruction set computer (RISC) architectures
Origins	IBM 801 Berkeley RISC Stanford MIPS
In active development	Analog Devices Blackfin ARC ARM AVR eSi-RISC LatticeMico8, LatticeMico32 MIPS OpenRISC Power ISA Renesas M32R, SuperH, V850 RISC-V SPARC Sunway Unicore Xilinx MicroBlaze, PicoBlaze
Development discontinued	Alpha AMD Am29000 Apollo PRISM Atmel AVR32 Clipper CR16 CRISP DEC PRISM Intel i860, i960 META MIPS-X Motorola 88000, M·CORE PA-RISC POWER, PowerPC (active use in space exploration as RAD750), ROMP

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