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Execution (computing) - Wikipedia
From Wikipedia, the free encyclopedia
(Redirected from Run time (program lifecycle phase))
Performing the actions encoded in a computer program
Program execution
General concepts
  • Code
  • Translation
    • Compiler
    • Compile time
    • Optimizing compiler
  • Linking
  • Execution
    • Runtime system
    • Executable
    • Interpreter
    • Virtual machine
  • Intermediate representation (IR)
Types of code
  • Source code
  • Object code
  • Bytecode
  • Machine code
  • Microcode
Compilation strategies
  • Ahead-of-time (AOT)
  • Just-in-time (JIT)
    • Tracing just-in-time
    • Compile and go system
  • Precompilation
  • Transcompilation
  • Recompilation
  • Meta-tracing
Notable runtimes
  • Android Runtime (ART)
  • BEAM (Erlang)
  • Common Language Runtime (CLR) and Mono
  • CPython and PyPy
  • crt0 (C target-specific initializer)
  • Java virtual machine (JVM)
  • LuaJIT
  • Objective-C and Swift's
  • V8 and Node.js
  • Zend Engine (PHP)
Notable compilers & toolchains
  • GNU Compiler Collection (GCC)
  • LLVM and Clang
  • MSVC
  • Glasgow Haskell Compiler (GHC)
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In computing, execution is the process by which a computer program is processed to perform the actions that it encodes. As the processor follows the program instructions, effects are produced in accordance with the semantics of those instructions. The term run is generally synonymous. The act of starting execution is often called launching or invoking in addition to executing and running.

An execution processor comes in many forms. A machine code program may be executed via the programmable interface of a computer where execution involves repeatedly following a fetch–decode–execute cycle for each program instruction executed by the control unit. Source code may be executed by interpreter software. A program may be executed in a batch process without human interaction or a user may type commands in an interactive session.

Relation to development

[edit]

Aspects of execution affect and drive software development.

Platform independence

[edit]

Often, software relies on external services such as a runtime environment and a runtime library tailored to the host environment to provide services that can decouple an executable from direct manipulation of the computer and its peripherals, and thus provide a more platform-independent solution.

Runtime error

[edit]

A runtime error is detected after or during the execution (running state) of a program, whereas a compile-time error is detected by the compiler before the program is executed. Type checking, register allocation, code generation, and code optimization are typically done at compile time, but may be done at runtime depending on the particular language and compiler. Many other runtime errors exist and are handled differently by different programming languages, such as division by zero errors, domain errors, array subscript out of bounds errors, arithmetic underflow errors, several types of underflow and overflow errors, and many other runtime errors generally considered as software bugs which may or may not be caught and handled by any particular computer language.

Exception handling supports handling runtime errors, providing a structured way to catch unexpected situations as well as predictable errors or unusual results without the amount of inline error checking required of languages without it. More recent advancements in runtime engines enable automated exception handling which provides "root-cause" debug information for every exception of interest and is implemented independent of the source code, by attaching a special software product to the runtime engine.

Debugging

[edit]

Some debugging can only be performed (or is more efficient or accurate when performed) at runtime. Logic errors and array bounds checking are examples. For this reason, some programming bugs are not discovered until the program is tested in a production environment with real data, despite sophisticated compile-time checking and pre-release testing. In this case, the end-user may encounter a "runtime error" message.

Execution environment

[edit]

An execution environment is the context in which a program runs. The following notable environment attributes are commonly-used. They are not strictly distinct as an environment may be described with multiple of these attributes.

Host-native

[edit]

Host-native is a common scenario for execution, especially historically. It involves controlling a computer via the instructions of its central processing unit (CPU). The CPU interprets the program at the machine instruction level.

Context switch

[edit]

Context switching, a feature of a multitasking operating system (OS), supports concurrent execution of multiple host-native executables. To swap out an executable (identified by a process-context identifier) from the execution environment, the OS saves its execution context data such as memory page addresses and register values. To swap it back in, the OS restores the data.[1]: 3.3 [2]

In a Linux-based OS, a set of data stored in registers is usually saved into a process descriptor in memory to implement a context switch.[1] PCIDs are also used.

Loading

[edit]

When a program is started, a loader performs memory setup and links the program with any dynamically linked libraries it needs, and then execution begins at the program's entry point. In some cases, a language or implementation will have these tasks done by the language runtime instead, though this is unusual in mainstream languages on common consumer operating systems.

Runtime system

[edit]

A runtime system is a software layer that provides services to an executable. It is a portion of an execution model.[clarification needed] Relatedly, a runtime environment (RTE) is everything that a program can interact with, including a runtime system.

Most programming languages include a runtime system. It may address issues including memory management, variable access, parameter passing mechanisms, operating system access, and more. The compiler makes assumptions depending on the specific runtime system to generate code. Typically, the runtime system has some responsibility for setting up and managing the stack and heap, and may include features such as garbage collection, threading or other dynamic features of the language.[3]

Instruction cycle

[edit]

The instruction cycle is the cycle that the CPU follows from boot-up until the computer has shut down in order to process instructions. It is composed of three main stages: the fetch stage, the decode stage, and the execute stage.

This is a simple diagram illustrating the individual stages of the fetch-decode-execute cycle.

In simpler CPUs, the instruction cycle is executed sequentially, each instruction being processed before the next one is started. In most modern CPUs, the instruction cycles are instead executed concurrently, and often in parallel, through an instruction pipeline: the next instruction starts being processed before the previous instruction has finished, which is possible because the cycle is broken up into separate steps.[4]

Virtual

[edit]

A virtual machine (VM) provides the functionality of a physical computer that is either partially or fully implemented as a layer of software – instead of accessing the host system directly. Via virtualization, a VM provides a computer system that is logically independent from the host computer and other VMs on the host via a relatively thin software layer that allows for relatively high performance at the cost of being constrained by the host's technology. Via emulation, a VM provides a distinct computer that may differ significantly from the host computer system technology, but generally at the cost of relatively slow performance due to a relatively thick software layer.

A VM technology can differ by scope. A system VM (a.k.a. full virtualization VM) provides the functionality needed to execute an independent operating system. A hypervisor uses native execution to share and manage hardware, allowing for multiple environments which are isolated from one another, yet exist on the same physical machine. Modern hypervisors use hardware-assisted virtualization, virtualization-specific hardware, primarily from the host CPUs. In contrast, a process VM (such as the .NET, Java and Python runtimes) executes a computer program in a platform-independent environment.

Some emulators, such as QEMU and video game console emulators, are designed to also emulate (or "virtually imitate") different system architectures thus allowing execution of software applications and operating systems written for another CPU or architecture. OS-level virtualization allows the resources of a computer to be partitioned via the kernel. The terms are not universally interchangeable.

Interpreted

[edit]

An interpreter executes code that is in a form that can be executed directly. Any preparation steps required for the environment have already been performed. An executable is directly executable by a CPU (including a virtual CPU). Source code can be executable in an environment that supports it. For example, JavaScript and Python are executed by interpreter software that does not require a compilation operation.

See also

[edit]
  • Executable – Data that causes a computer to follow indicated instructions
  • Program counter – Register that stores where in a program a processor is executing
  • Program lifecycle phase

References

[edit]
  1. ^ a b Bovet, Daniel P. (2005). Understanding the Linux Kernel. Marco Cesati (3 ed.). Sevastopol, CA: O'Reilly. ISBN 0-596-00565-2. OCLC 64549743.
  2. ^ "Difference between Swapping and Context Switching". GeeksforGeeks. 2021-06-10. Retrieved 2022-08-10.
  3. ^ Aho, Alfred V.; Lam, Monica Sin-Ling; Sethi, Ravi; Ullman, Jeffrey David (2007). Compilers: Principles, Techniques and Tools (2nd ed.). Boston, MA, US: Pearson Education. p. 427. ISBN 978-0-321-48681-3.
  4. ^ Crystal Chen, Greg Novick and Kirk Shimano (2000). "Pipelining". Retrieved 2019-06-26.
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Processor technologies
Models
  • Abstract machine
  • Stored-program computer
  • Finite-state machine
    • with datapath
    • Hierarchical
    • Deterministic finite automaton
    • Queue automaton
    • Cellular automaton
    • Quantum cellular automaton
  • Turing machine
    • Alternating Turing machine
    • Universal
    • Post–Turing
    • Quantum
    • Nondeterministic Turing machine
    • Probabilistic Turing machine
    • Hypercomputation
    • Zeno machine
  • Belt machine
  • Stack machine
  • Register machines
    • Counter
    • Pointer
    • Random-access
    • Random-access stored program
Architecture
  • Microarchitecture
  • Von Neumann
  • Harvard
    • modified
  • Dataflow
  • Transport-triggered
  • Cellular
  • Endianness
  • Memory access
    • NUMA
    • HUMA
    • Load–store
    • Register/memory
  • Cache hierarchy
  • Memory hierarchy
    • Virtual memory
    • Secondary storage
  • Heterogeneous
  • Fabric
  • Multiprocessing
  • Cognitive
  • Neuromorphic
Instruction set
architectures
Types
  • Orthogonal instruction set
  • CISC
  • RISC
  • Application-specific
  • EDGE
    • TRIPS
  • VLIW
    • EPIC
  • MISC
  • OISC
  • NISC
  • ZISC
  • VISC architecture
  • Quantum computing
  • Comparison
    • Addressing modes
Instruction
sets
  • Motorola 68000 series
  • VAX
  • PDP-11
  • x86
  • ARM
  • Stanford MIPS
  • MIPS
  • MIPS-X
  • Power
    • POWER
    • PowerPC
    • Power ISA
  • Clipper architecture
  • SPARC
  • SuperH
  • DEC Alpha
  • ETRAX CRIS
  • M32R
  • Unicore
  • Itanium
  • OpenRISC
  • RISC-V
  • MicroBlaze
  • LMC
  • System/3x0
    • S/360
    • S/370
    • S/390
    • z/Architecture
  • Tilera ISA
  • VISC architecture
  • Epiphany architecture
  • Others
Execution
Instruction pipelining
  • Pipeline stall
  • Operand forwarding
  • Classic RISC pipeline
Hazards
  • Data dependency
  • Structural
  • Control
  • False sharing
Out-of-order
  • Scoreboarding
  • Tomasulo's algorithm
    • Reservation station
    • Re-order buffer
  • Register renaming
  • Wide-issue
Speculative
  • Branch prediction
  • Memory dependence prediction
Parallelism
Level
  • Bit
    • Bit-serial
    • Word
  • Instruction
  • Pipelining
    • Scalar
    • Superscalar
  • Task
    • Thread
    • Process
  • Data
    • Vector
  • Memory
  • Distributed
Multithreading
  • Temporal
  • Simultaneous
    • Hyperthreading
    • Simultaneous and heterogenous
  • Speculative
  • Preemptive
  • Cooperative
Flynn's taxonomy
  • SISD
  • SIMD
    • Array processing (SIMT)
    • Pipelined processing
    • Associative processing
    • SWAR
  • MISD
  • MIMD
    • SPMD
Processor
performance
  • Transistor count
  • Instructions per cycle (IPC)
    • Cycles per instruction (CPI)
  • Instructions per second (IPS)
  • Floating-point operations per second (FLOPS)
  • Transactions per second (TPS)
  • Synaptic updates per second (SUPS)
  • Performance per watt (PPW)
  • Cache performance metrics
  • Computer performance by orders of magnitude
Types
  • Central processing unit (CPU)
  • Graphics processing unit (GPU)
    • GPGPU
  • Vector
  • Barrel
  • Stream
  • Tile processor
  • Coprocessor
  • PAL
  • ASIC
  • FPGA
  • FPOA
  • CPLD
  • Multi-chip module (MCM)
  • System in a package (SiP)
  • Package on a package (PoP)
By application
  • Embedded system
  • Microprocessor
  • Microcontroller
  • Mobile
  • Ultra-low-voltage
  • ASIP
  • Soft microprocessor
Systems
on chip
  • System on a chip (SoC)
  • Multiprocessor (MPSoC)
  • Cypress PSoC
  • Network on a chip (NoC)
Hardware
accelerators
  • Coprocessor
  • AI accelerator
  • Graphics processing unit (GPU)
  • Image processor
  • Vision processing unit (VPU)
  • Physics processing unit (PPU)
  • Digital signal processor (DSP)
  • Tensor Processing Unit (TPU)
  • Secure cryptoprocessor
  • Network processor
  • Baseband processor
Word size
  • 1-bit
  • 4-bit
  • 8-bit
  • 12-bit
  • 15-bit
  • 16-bit
  • 24-bit
  • 32-bit
  • 48-bit
  • 64-bit
  • 128-bit
  • 256-bit
  • 512-bit
  • bit slicing
  • others
    • variable
Core count
  • Single-core
  • Multi-core
  • Manycore
  • Heterogeneous architecture
Components
  • Core
  • Cache
    • CPU cache
    • Scratchpad memory
    • Data cache
    • Instruction cache
    • replacement policies
    • coherence
  • Bus
  • Clock rate
  • Clock signal
  • FIFO
Functional
units
  • Arithmetic logic unit (ALU)
  • Address generation unit (AGU)
  • Floating-point unit (FPU)
  • Memory management unit (MMU)
    • Load–store unit
    • Translation lookaside buffer (TLB)
  • Branch predictor
  • Branch target predictor
  • Integrated memory controller (IMC)
    • Memory management unit
  • Instruction decoder
Logic
  • Combinational
  • Sequential
  • Glue
  • Logic gate
    • Quantum
    • Array
Registers
  • Processor register
  • Status register
  • Stack register
  • Register file
  • Memory buffer
  • Memory address register
  • Program counter
Control unit
  • Hardwired control unit
  • Instruction unit
  • Data buffer
  • Write buffer
  • Microcode
  • ROM
  • Counter
Datapath
  • Multiplexer
  • Demultiplexer
  • Adder
  • Multiplier
    • CPU
  • Binary decoder
    • Address decoder
    • Sum-addressed decoder
  • Barrel shifter
Circuitry
  • Integrated circuit
    • 3D
    • Mixed-signal
    • Power management
  • Boolean
  • Digital
  • Analog
  • Quantum
  • Switch
Power
management
  • PMU
  • APM
  • ACPI
  • Dynamic frequency scaling
  • Dynamic voltage scaling
  • Clock gating
  • Performance per watt (PPW)
Related
  • History of general-purpose CPUs
  • Microprocessor chronology
  • Processor design
  • Digital electronics
  • Hardware security module
  • Semiconductor device fabrication
  • Tick–tock model
  • Pin grid array
  • Chip carrier
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